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91400 rm (im) ohta-1/16 ver.1.03 90699 preliminary overview the LC7454A/m is a data slicer ic for the index plus + signals. the LC7454A/m extracts the caption and the index plus + data form the vertical blanking period of the tv signal and send it out to the decoder ic (usually microcomputer). the LC7454A/m can be used to extract the closed caption signals, the xds signals and the index plus + signals. features (1) low power dessipation by cmos process (2) stable signal extraction by integrated peak hold circuit and digital circuit. (3) operation voltage range : 5v 10% (4) package LC7454A : dip18 lc7454m : mfp20 cmos data slicer LC7454A/m ordering number : enn*6685 cmos ic
LC7454A/m 2/16 pin assignment LC7454A lc7454m * vdd1and vss1are power supply terminals for digital circuit. vdd2 and vss2 are power supply terminals for analog circuit. connect there terminals as the following diagram in order to reduce the noise disturbance between two powers. dip18 mfp20 vss1 test ln26 o/ e /cfout hs /cfin data sckin ce ioc cp vss2 vdd2 mod1 vcor cvin mod0 vdd1 slice 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 vss1 test ln26 o/ e /cfout hs /cfin data sckin ce ioc nc cp vss2 vdd2 mod1 vcor cvin mod0 vdd1 slice nc 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 vdd1 vss1 vdd2 vss 2 power supply LC7454A/m
LC7454A/m 3/16 package dimension (unit : mm) 3007b sanyo : dip-18 package dimension (unit : mm) 3036c sanyo : mfp-20
LC7454A/m 4/16 lc7454system block diagram ln26 ioc data sckin ce cp slice vcor input control data input/output control 16bit data judgement buffer 32bit data output buffer 1 32bit data output buffer 5 32bit data output buffer 4 32bit data output buffer 3 32bit data output buffer 2 data judgment 16bit line select data buffer slice line selection data s li cer contro l 32bit data buffer data transmit control data slicer sync separator pedestal clamp pll (vco) oscillation circuit cvin o/e/cfout hs/cfin (mode 1) (mode 2) (mode3) (mode 2) (mode 1,3) (mode 1) (mode 3) (mode 2) pll reference clock
LC7454A/m 5/16 operation on each mode the lc7454 has three operating modes. the operation mode be selected by the status of mod0 and mod1 terminals. the functionalit y of three modes are the same. only the pll reference frequency which is used to generate operation clock is different. use mode1 or mode3 only in the application which uses 2x data. any mode (mode1,2 or 3) can be used in the 1x data only application. terminal mod1 mod0 mode applications pll reference open open mode1 ntsc-vcr use h-sync signal which is separated from c-video signal. open vdd1 mode2 ntsc-vcr use 1/32 divided signal 503 khz which is generated by external ceramic resonator. vdd open mode3 ntsc-tv use h-sync signal from fly back. terminal functions function description terminal # (dip18) terminal name mode 1 mode 2 mode 3 1 vss1 ground 2 test test terminal, open in normal operation 3 ln26 32 s pulse output at line 26 timing on both field 4 o/ e /cfout pulse output for field judgment *1 output terminal for ceramic resonator pulse output for field judgment *1 5 hs /cfin sync separated hs pulse output input terminal for ceramic resonator external hs pulse input 6 data line select data input and slice data output *2 7 sckin data transmit clock input 8 ce chip select input *3 9 ioc data direction control signal input *4 10 slice pulse output at selected slice line 11 vdd1 power terminal 12 mod0 open connect to vdd open 13 cvin conposit video input 14 vcor connect resister for internal vco oscillation frequency control 15 mod1 open open connect to vdd 16 vdd2 power terminal 17 vss2 ground 18 cp filter terminal for internal pll *1 ?h? level in odd field, ?l? level in even field. *2 n-ch open drain in output mode. *3 feed ?l? level only when data transmission is in effect. if ce=?h?, data terminal will become input/output disable, sckin terminal will become input disable. *4 ?h? level : output mode ?l? level : input mode
LC7454A/m 6/16 1. absolute maximum ratings at vss=0v and ta=25 c ratings parameter symbol pins conditions min. typ. max. unit maximum supply voltage vddmax vdd1,vdd2 vdd1=vdd2 -0.3 +7.0 input voltage vi cvin,sckin, ce ,ioc -0.3 vdd+0.3 output voltage vo ln26, o/ e /cfout,slice -0.3 vdd+0.3 input/output voltage vio data, hs /cfin -0.3 vdd+0.3 v dip18 300 allowable power dissipation pdmax mfp20 150 mw operating temperature topr -30 +70 storage temperature tstg -55 +150 c * vss1 and vss2 must be the same level. vdd1 and vdd2 must be the same level. 2. allowable operating conditions at ta=-30 c to +70 c, vss=0v ratings parameter symbol pins conditions vdd[v] min. typ. max. unit operating supply voltage vdd vdd1,vdd2 vdd1=vdd2 4.5 5.5 ?h? level input voltage vih hs /cfin, data, sckin, ce , ioc 4.5 to 5.5 0.75vdd vdd ?l? level input voltage vil hs /cfin, data, sckin, ce , ioc 4.5 to 5.5 vss 0.25vdd cvin input amplitude cvsync cvin sync-white=1.0v 4.5 to 5.5 1vp-p -3db 1v 1vp-p +3db v hs input frequency range fh hs /cfin mode3 4.5 to 5.5 15.23 15.73 16.23 oscillation frequency range (note 1) fmcf hs /cfin o/ e /cfout mode2 refer to figure 1 4.5 to 5.5 503 khz oscillation stabilizing time period (note 2) tmscf hs /cfin o/ e /cfout mode2 refer to figure 2 4.5 to 5.5 0.5 5 ms (note 1) refer to table 1 for oscillator constants. (note 2) oscillation stabilizing period is the time needed to stabilize the oscillation after power is fed. refer to figure 2.
LC7454A/m 7/16 3. electrical characteristics at ta=-30 c to +70 c, vss=0v ratings parameter symbol pins conditions vdd[v] min. typ. max. unit ?h? level input current iih hs /cfin, data, sckin, ce , ioc vin=vdd 4.5 to 5.5 1 ?l? level input current iil hs /cfin, data, sckin, ce , ioc vin=vss 4.5 to 5.5 -1 a ?h? level output voltage voh ln26, slice, o/ e /cfout, hs /cfin ioh=-4ma 4.5 to 5.5 vdd-1.2 ?l? level output voltage vol ln26, data, o/ e /cfin, hs /cfin, slice iol=10ma 4.5 to 5.5 1 input clamp voltage vclm p cvin 5.0 2.3 2.5 2.7 v clamp input current cii cvin cvin=3v 5.0 5 10 18 clamp output current coi cvin cvin=2v 5.0 -120 -70 -30 a power dissipation idd vdd1,vdd2 4.5 to 5.5 8 20 ma 4. serial input/output characteristics at ta=-30 c to +70 c, vss=0v ratings parameter symbol pins conditions vdd[v] min. typ. max. unit cycle t ckcy sckin refer to figure 3 4.5 to 5.5 1 ?l? level pulse width t ckl sckin refer to figure 3 4.5 to 5.5 0.5 input clock ?h? level pulse width t ckh sckin refer to figure 3 4.5 to 5.5 0.5 serial clock set up time t ick sckin applied to ce falling edge. refer to figure 3 4.5 to 5.5 1 data set up time t ido 4.5 to 5.5 0.1 serial input data hold time t hdo data applied to sckin rising edge. refer to figure 3 4.5 to 5.5 0.1 serial output output delay t odt data applied to sckin falling edge. use external 1k ? pull-up resister. refer to figure 3 4.5 to 5.5 0.5 s table 1. ceramic resonator constants type of oscillation maker resonator c1 c2 503khz ceramic oscillation murata csb 503e9 150pf 150pf * both c1 and c2 must be use k rank (10%) and sl characteristics. (notes) please place the oscillation-related parts as close to the oscillation pins as possible with the shortest possible pattern length since the circuit pattern affects the oscillation frequency. if you use other oscillators herein, we provide no guarantee for the characteristics.
LC7454A/m 8/16 figure 1 ceramic resonator oscillation figure 2 oscillation stable time period figure 3 serial output test condition hs/cfin o/ e /cfout cf c1 c2 vdd lowest limit of operation 0v tmscf power supply hs /cfin o/ e /cfout 0.5vdd tick vdd 1k ? 50pf tckcy tckl tckh thdt tidt todt ce sckin data(input) data(output) data is high-impedance when ce =h
LC7454A/m 9/16 slice line selection slice line selection data is sent to the lc7454 in serial format . when sending the data to lc7454, the ioc terminal has to be ?l? level (it will change the data line to the input mode). the data has to be transmitted after sensing the ln26 signal. before sending the data, set the ce terminal to the ?l? level. each bit of the data has to be changed at the falling edge of th e sckin and the data is captured into the lc7454 at raising edge of the sckin signal. maximum of 5 lines between line 10 and 25 can be selected at a time in a field. the lc7454 can slice 1x and 2x data format signals. each d0 to d15 corresponds to line 10 to line 25. set specific bit to ?h? to select the corresponding line. example: to select 15, 18, 19, 21 and 23 lines send d0 - d15 = [0000010011010100] note: if more than 6 line are selected, data extraction will be made on the first 5 lines. the data on the 6th line and after are not extracted. the new data sent to the lc7454 takes effects from the next field. c-video dat a ln26 ce ioc sckin d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 l level line26
LC7454A/m 10/16 b30 b31 29 b0 b1 b30 b31 29 b0 b1 b30 b31 29 b0 b1 b30 b31 29 b0 b1 b30 b31 29 b0 b1 b14 b15 13 b0 b1 ln26 ln21 data transfer cloc k (inside ic) c-video dat a c-video data output timing ce ioc scki n ce data data data data selected line 4 selected line 3 selected line 2 selected line 1 selected line 5 32 bit data output buffer 5 32 bit data output buffer 4 32 bit data output buffer 3 32 bit data output buffer 2 32 bit data output buffer 1 12h 21h 24h 23h 22h 20h 19h 15h 16h 17h 18h 14h 13h 25h 34h 37h 36h 35h 33h 32h 28h 29h 30h 31h 27h 26h 40h 39h 38h data (l level) (h level) (h level) [data of 32 bit data output buffer 4] [data of 32 bit data output buffer 2] [16 bit data judgment buffer data] 16 clock 32 clock [data of 32 bit data output buffer 5] 32 clock 32 clock [data of 32 bit data output buffer 3] 32 clock 32 clock [data of 32 bit data output buffer 1]
LC7454A/m 11/16 the lc7454 can extract the index plus + format data. if the line contains the 1x format data, the first 15 bits of the 32 bit data buffer are filled with ?0? and 16th bit becomes ? 1?. the extracted data is stored is stored form 16th to 31st bit. 32 bit data output buffer 32 bit data output buffer five 32 bit data buffer are provided to store maximum of 5 line data in a field. if the data with correct format exists in the selected lines, the extracted data are stored into the buffers by the order of line number. if correct data is not found on the selected line, the data buffer is filled with ?0?. all five data buffers are cleared by the line 10 sensing signal in the next field. therefore, the data have to be read out between ln26 and the line 10 of the next field. please read only the selected buffers. for example, if three lines are selected, read the first three 32 bit buffers only. p2 b6 b5 b4 b3 b2 b1 b0 p1 b6 b4 b3 b2 b1 b0 b5 data b y te 1 p4 b6 b5 b4 b3p b2 b1 b0 p3 b6 b4 b3 b2 b1 b0 b0 b1 b2 b3 b4 b5 b6 p1 b0 b1 b2 b3 b4 b5 b6 p2 b5 data byte 2 msb b31 b0 output direction lsb 2x data format data b y te 3 data byte 4 b 0 data byte 1 p2 b6 b5 b4 b3 b2 b1 b0 p1 b6 b4 b3 b2 b1 b0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 b5 data byte 2 msb b 31 b0 output direction lsb fixed to ?0000000000000001?, if 1x data is received 1x data format b 1 b 2 b 3 b 4 b 5 b 6 p 1 p 2 p 3 p 4 b 0 b 1 b 2 b 3 b 4 b 5 b 6 b 0 b 1 b 2 b 3 b 4 b 5 b 6 b 0 b 1 b 2 b 3 b 4 b 5 b 6
LC7454A/m 12/16 <16 bit data judgment buffer> the data judgment buffer includes the data which indicates the existence of the index plus + format data and data rate (1x or 2x). bit 0 to 4 contain the existence of the signal and bit 8 to 15 contain the data rate. bit 7 contains the field informat ion (odd or even). the following table shows functions of each bit. b0 to b7 : existence of 1x or 2x data format. b8 to b15 : data format judgment on the selected line. *if neither 1x nor 2x data are sensed on the selected line, these bits become ?0?. *16 bit data judgment buffer is cleared at the next line 10 as well as 32 bit data output buffer 1-5. *even though the data judgment buffer indicates the existence of the data, it is recommended that the existence of the data should be verified by checking the parity bit of the data. bit contents note b0 0 : data do not exist on the first selected line. 1 : data exist on the first selected line. ?0? if no line is selected. b1 0 : data do not exist on the second selected line. 1 : data exist on the second selected line. ?0? if one or less line is selected. b2 0 : data do not exist on the third selected line. 1 : data exist on the third selected line. ?0? if two or less line is selected. b3 0 : data do not exist on the fourth selected line. 1 : data exist on the fourth selected line. ?0? if three or less line is selected. b4 0 : data do not exist on the fifth selected line. 1 : data exist on the fifth selected line. ?0? if four or less line is selected. b5 b6 not use always?0? b7 0 : even field 1 : odd field bit contents note b8 0 : 1x data format on the first line. 1 : 2x data format on the first line. ?0? if no line is selected. b9 0 : 1x data format on the second line. 1 : 2x data format on the second line. ?0? if one or less line is selected. b10 0 : 1x data format on the third line. 1 : 2x data format on the third line. ?0? if two or less line is selected. b11 0 : 1x data format on the fourth line. 1 : 2x data format on the fourth line. ?0? if three or less line is selected. b12 0 : 1x data format on the fifth line. 1 : 2x data format on the fifth line. ?0? if four or less line is selected. b13 b14 b15 not use always?0? b 1 b 10 b 9 b 8 b 7 b 6 b 5 b 4 b 3 b 2 b 11 b 0 b 15 b 14 b 13 b 12 output direction
LC7454A/m 13/16 applications (mode 1) dip18 mfp20 main com 2.2 ? 10k ? c-video 1 f + - vss1 test ln26 o/ e /cfout hs /cfin data sckin ce ioc nc cp vss2 vdd2 mod1 vcor cvin mod0 vdd1 slice nc 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 main -com 2.2 ? 10k ? c-video 1
LC7454A/m 14/16 applications (mode 2) dip18 mfp20 main -com 2.2 f 1m ? 10k ? c-video 1 f + - vss1 test ln26 o/ e /cfout hs /cfin data sckin ce ioc nc cp vss2 vdd2 mod1 vcor cvin mod0 vdd1 slice nc 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 main -com 2.2 f 1m ? 10k ? c-video 1
LC7454A/m 15/16 applications (mode 3) dip18 mfp20 main -com 2.2 f 10k ? c-video 1 f + - vss1 test ln26 o/ e /cfout hs /cfin data sckin ce ioc nc cp vss2 vdd2 mod1 vcor cvin mod0 vdd1 slice nc 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 main -com 2.2 ? 10k ? c-video 1 f + - vss1 test ln26 o/ e /cfout hs /cfin data sckin ce ioc cp vss2 vdd2 mod1 vcor cvin mod0 vdd1 slice 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 hsync signal ( from f.b. ) hsync signal (from f.b.)
LC7454A/m 16/16 memo: ps

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